The semiconductor industry has made great advances in miniaturizing semiconductor chips and devices. However, as these devices get smaller and smaller, there is still the task of connecting the chips and devices into the products for which they have been designed. One method for making such connections is through wire bond pads created on the semiconductor chip/device. Wire bond pads are typically rectangular pad structures that include a bond ball that provides a connection point to the semiconductor device for a wire. Wire bond pads also generally include probe points that allow external probes to check the chip/device for any faults after manufacture.
FIG. 1 is a diagram illustrating bonding structure 10 featuring typical bond pads 100. Bonding structure 10 is shown with four bond pads 100, each having probe mark 101 and bond ball 102 constructed thereon. Wire 103 is shown connected to bond ball 102 and, on the other end, to the host structure (not shown). The pad pitch is generally shown as the distance between the leading edge of one bond pad to the leading edge of the bond ball of the next bond pad.
Currently, the typical minimum wire bond pad pitch is about 50 μm for mass production devices. As technology continues to advance, a greater number of input/output (I/O) pads are desired. However, reducing the size of the bond pads is not the only consideration when designing increased numbers of I/O pads on any given device. In designing a wire bonding process, there are typically three major process parameters that are considered: (1) bonding power; (2) bonding force; and (3) bonding time. Of these three parameters, bonding power is seen as having the most affect on the quality of the resulting bond. Thus, bonding power is generally considered the more important parameter. Typically, there will be an acceptable bonding power range, referred to as the bonding power window, for a particular combination of wire/bond pad dimensions and material. It is generally considered more beneficial to have a wide bonding power window to ensure bonding quality when process variations occur. In practice, it is desirable to achieve a bonding power window in the range of greater than or equal to about a 30% window. Therefore, when considering an increase in the number of I/O pads on any given device, the wire diameter becomes as critical a consideration as the size of the bond pad itself.
Using finer gauge wire generally results in a larger bonding power window. However, finer gauge wire also typically exhibits worse electrical properties than thicker gauges. Therefore, there is a limit to how fine the bonding wire may be that is used for bonding semiconductor devices. In designing smaller bond pad systems for an increased number of I/O pads, an important balance should be maintained between bonding wire gauge and bond pad size in order to maintain an acceptable bonding power window and acceptable electrical properties. This balance is what has provided effective size and gauge limits on modern bonding technology.